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NVM Express

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</style><table class="infobox hproduct"><caption class="infobox-title fn">NVM Express</caption><tbody><tr><td colspan="2" class="infobox-subheader">Non-Volatile Memory Host Controller Interface Specification</td></tr><tr><td colspan="2" class="infobox-image"></td></tr><tr><th scope="row" class="infobox-label">Abbreviation</th><td class="infobox-data">NVMe</td></tr><tr><th scope="row" class="infobox-label">Status</th><td class="infobox-data">Published</td></tr><tr><th scope="row" class="infobox-label">Year started</th><td class="infobox-data">2011 (2011)</td></tr><tr><th scope="row" class="infobox-label">Latest version</th><td class="infobox-data">2.1 August 5, 2024 (2024-08-05)<a href="#cite_note-v21-1">[1]</a></td></tr><tr><th scope="row" class="infobox-label">Organization</th><td class="infobox-data">NVM Express, Inc. (since 2014) NVM Express Work Group (before 2014)</td></tr><tr><th scope="row" class="infobox-label">Website</th><td class="infobox-data"><a rel="nofollow" class="external text" href="https://nvmexpress.org">nvmexpress.org</a></td></tr></tbody></table>

NVM Express (NVMe) or Non-Volatile Memory Host Controller Interface Specification (NVMHCIS) is an <a href="Open_standard" title="Open standard">open</a>, <a href="Logical_device" class="mw-redirect" title="Logical device">logical-device</a> <a href="Interface_(computing)" title="Interface (computing)">interface</a> <a href="Functional_specification" title="Functional specification">specification</a> for accessing a computer's <a href="Non-volatile_storage" class="mw-redirect" title="Non-volatile storage">non-volatile storage</a> media usually attached via the <a href="PCI_Express" title="PCI Express">PCI Express</a> bus. The initial NVM stands for <a href="Non-volatile_memory" title="Non-volatile memory">non-volatile memory</a>, which is often NAND <a href="Flash_memory" title="Flash memory">flash memory</a> that comes in several physical form factors, including <a href="Solid-state_drive" title="Solid-state drive">solid-state drives</a> (SSDs), PCIe add-in cards, and <a href="M.2" title="M.2">M.2</a> cards, the successor to <a href="MSATA" class="mw-redirect" title="MSATA">mSATA</a> cards. NVM Express, as a logical-device interface, has been designed to capitalize on the low <a href="Hard_disk_drive_performance_characteristics#Access_time" title="Hard disk drive performance characteristics">latency</a> and internal parallelism of solid-state storage devices.<a href="#cite_note-2">[2]</a>

Architecturally, the logic for NVMe is physically stored within and executed by the NVMe controller chip that is physically co-located with the storage media, usually an SSD. Version changes for NVMe, e.g., 1.3 to 1.4, are incorporated within the storage media, and do not affect PCIe-compatible components such as motherboards and CPUs.<a href="#cite_note-3">[3]</a>

By its design, NVM Express allows host hardware and software to fully exploit the levels of <a href="Parallel_computing" title="Parallel computing">parallelism</a> possible in modern SSDs. As a result, NVM Express reduces <a href="Input/output" title="Input/output">I/O</a> overhead and brings various performance improvements relative to previous logical-device interfaces, including multiple long command queues, and reduced latency. The previous interface protocols like <a href="Advanced_Host_Controller_Interface" title="Advanced Host Controller Interface">AHCI</a> were developed for use with far slower <a href="Hard_disk_drive" title="Hard disk drive">hard disk drives</a> (HDD) where a very lengthy delay (relative to CPU operations) exists between a request and data transfer, where data speeds are much slower than RAM speeds, and where disk rotation and <a href="Seek_time" class="mw-redirect" title="Seek time">seek time</a> give rise to further optimization requirements.

NVM Express devices are chiefly available in the miniature <a href="M.2" title="M.2">M.2</a> form factor, while standard-sized PCI Express <a href="Expansion_card" title="Expansion card">expansion cards</a><a href="#cite_note-4">[4]</a> and 2.5-inch form-factor devices that provide a four-lane PCI Express interface through the <a href="U.2" title="U.2">U.2</a> connector (formerly known as SFF-8639) are also available.<a href="#cite_note-5">[5]</a><a href="#cite_note-6">[6]</a>

<div class="mw-heading mw-heading2"><h2 id="Specifications">Specifications</h2></div>

Specifications for NVMe released to date include:<a href="#cite_note-7">[7]</a>

<ul><li>1.0e (January 2013)</li>

<li>1.1b (July 2014) that adds standardized Command Sets to achieve better compatibility across different NVMe devices, Management Interface that provides standardized tools for managing NVMe devices, simplifying administration and Transport Specifications that defines how NVMe commands are transported over various physical interfaces, enhancing interoperability.<a href="#cite_note-8">[8]</a></li>

<li>1.2 (November 2014)

<ul><li>1.2a (October 2015)</li>

<li>1.2.1 (June 2016) that introduces the following new features over version 1.1b: Multi-Queue to supports multiple I/O queues, enhancing data throughput and performance, Namespace Management that allows for dynamic creation, deletion, and resizing of namespaces, providing greater flexibility, and Endurance Management to monitor and manage SSD wear levels, optimizing performance and extending drive life.<a href="#cite_note-9">[9]</a></li></ul></li>

<li>1.3 (May 2017)

<ul><li>1.3a (October 2017)</li>

<li>1.3d (March 2019) that since version 1.2.1 added Namespace Sharing to allow multiple hosts accessing a single namespace, facilitating shared storage environments, Namespace Reservation to provides mechanisms for hosts to reserve namespaces, preventing conflicts and ensuring data integrity, and Namespace Priority that sets priority levels for different namespaces, optimizing performance for critical workloads.<a href="#cite_note-10">[10]</a><a href="#cite_note-11">[11]</a></li></ul></li>

<li>1.4 (June 2019)

<ul><li>1.4a (March 2020)</li>

<li>1.4b (September 2020)</li>

<li>1.4c (June 2021), that has the following new features compared to 1.3d: IO Determinism to ensure consistent latency and performance by isolating workloads, Namespace Write Protect for preventing data corruption or unauthorized modifications, Persistent Event Log that stores event logs in non-volatile memory, aiding in diagnostics and troubleshooting, and Verify Command that checks the integrity of data.<a href="#cite_note-12">[12]</a><a href="#cite_note-13">[13]</a></li></ul></li>

<li>2.0b (January 2022)</li>

<li>2.0c (October 2022)</li>

<li>2.0d (January 2024),<a href="#cite_note-v20d-15">[15]</a> that, compared to 1.4c, introduces Zoned Namespaces (ZNS) to organize data into zones for efficient write operations, reducing write amplification and improving SSD longevity, Key Value (KV) for efficient storage and retrieval of key-value pairs directly on the NVMe device, bypassing traditional file systems, Endurance Group Management to manages groups of SSDs based on their endurance, optimizing usage and extending lifespan.<a href="#cite_note-16">[16]</a><a href="#cite_note-v20d-15">[15]</a><a href="#cite_note-17">[17]</a></li></ul></li>

<li>2.1 (August 2024)<a href="#cite_note-v21-1">[1]</a> that introduces Live Migration to maintaining service availability during migration, Key Per I/O for applying encryption keys at a per-operation level, NVMe-MI High Availability Out of Band Management for managing NVMe devices outside of regular data paths, and NVMe Network Boot / UEFI for booting NVMe devices over a network.<a href="#cite_note-18">[18]</a></li></ul>

<div class="mw-heading mw-heading2"><h2 id="Background">Background</h2></div>

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</style><div class="thumb tmulti tright"><div class="thumbinner multiimageinner" style="width:304px;max-width:304px"><div class="trow"><div class="tsingle" style="width:302px;max-width:302px"><div class="thumbimage"></div></div></div><div class="trow"><div class="tsingle" style="width:302px;max-width:302px"><div class="thumbimage"></div></div></div><div class="trow" style="display:flex"><div class="thumbcaption">Intel SSD 750 series, an SSD that uses NVM Express, in form of a <a href="PCI_Express_3.0" class="mw-redirect" title="PCI Express 3.0">PCI Express 3.0</a> ×4 <a href="Expansion_card" title="Expansion card">expansion card</a> (front and rear views)</div></div></div></div>

Historically, most SSDs used <a href="Bus_(computing)" title="Bus (computing)">buses</a> such as <a href="SATA" title="SATA">SATA</a>,<a href="#cite_note-19">[19]</a> <a href="Serial_Attached_SCSI" title="Serial Attached SCSI">SAS</a>,<a href="#cite_note-20">[20]</a><a href="#cite_note-21">[21]</a> or <a href="Fibre_Channel" title="Fibre Channel">Fibre Channel</a> for interfacing with the rest of a computer system. Since SSDs became available in mass markets, SATA has become the most typical way for connecting SSDs in <a href="Personal_computer" title="Personal computer">personal computers</a>; however, SATA was designed primarily for interfacing with mechanical <a href="Hard_disk_drive" title="Hard disk drive">hard disk drives</a> (HDDs), and it became increasingly inadequate for SSDs, which improved in speed over time.<a href="#cite_note-22">[22]</a> For example, within about five years of mass market mainstream adoption (2005–2010) many SSDs were already held back by the comparatively slow data rates available for hard drives—unlike hard disk drives, some SSDs are limited by the maximum <a href="Throughput" class="mw-redirect" title="Throughput">throughput</a> of SATA.

High-end SSDs had been made using the <a href="PCI_Express" title="PCI Express">PCI Express</a> bus before NVMe, but using non-standard specification interfaces, using a SAS to PCIe bridge<a href="#cite_note-23">[23]</a> or by emulating a hardware RAID controller.<a href="#cite_note-24">[24]</a> By standardizing the interface of SSDs, <a href="Operating_system" title="Operating system">operating systems</a> only need one common <a href="Device_driver" title="Device driver">device driver</a> to work with all SSDs adhering to the specification. It also means that each SSD manufacturer does not have to design specific interface drivers. This is similar to how <a href="USB_mass_storage" class="mw-redirect" title="USB mass storage">USB mass storage</a> devices are built to follow the <a href="USB" title="USB">USB</a> mass-storage device class specification and work with all computers, with no per-device drivers needed.<a href="#cite_note-whitepaper-25">[25]</a>

NVM Express devices are also used as the building block of the <a href="Burst_buffer" title="Burst buffer">burst buffer</a> storage in many leading supercomputers, such as <a href="Fugaku_(supercomputer)" title="Fugaku (supercomputer)">Fugaku Supercomputer</a>, <a href="Summit_(supercomputer)" title="Summit (supercomputer)">Summit Supercomputer</a> and <a href="Sierra_(supercomputer)" title="Sierra (supercomputer)">Sierra Supercomputer</a>, etc.<a href="#cite_note-26">[26]</a><a href="#cite_note-27">[27]</a>

<div class="mw-heading mw-heading2"><h2 id="History">History</h2></div>

The first details of a new standard for accessing non-volatile memory emerged at the <a href="Intel_Developer_Forum" title="Intel Developer Forum">Intel Developer Forum</a> 2007, when NVMHCI was shown as the host-side protocol of a proposed architectural design that had <a href="Open_NAND_Flash_Interface_Working_Group" title="Open NAND Flash Interface Working Group">Open NAND Flash Interface Working Group</a> (ONFI) on the memory (flash) chips side.<a href="#cite_note-28">[28]</a> A NVMHCI working group led by Intel was formed that year. The NVMHCI 1.0 specification was completed in April 2008 and released on Intel's web site.<a href="#cite_note-29">[29]</a><a href="#cite_note-30">[30]</a><a href="#cite_note-31">[31]</a>

Technical work on NVMe began in the second half of 2009.<a href="#cite_note-Onufryk-32">[32]</a> The NVMe specifications were developed by the NVM Express Workgroup, which consists of more than 90 companies; Amber Huffman of <a href="Intel_Corporation" class="mw-redirect" title="Intel Corporation">Intel</a> was the working group's chair. Version 1.0 of the specification was released on 1 March 2011,<a href="#cite_note-33">[33]</a> while version 1.1 of the specification was released on 11 October 2012.<a href="#cite_note-34">[34]</a> Major features added in version 1.1 are multi-path I/O (with namespace sharing) and arbitrary-length <a href="Scatter-gather" class="mw-redirect" title="Scatter-gather">scatter-gather</a> I/O. It is expected that future revisions will significantly enhance namespace management.<a href="#cite_note-Onufryk-32">[32]</a> Because of its feature focus, NVMe 1.1 was initially called "Enterprise NVMHCI".<a href="#cite_note-35">[35]</a> An update for the base NVMe specification, called version 1.0e, was released in January 2013.<a href="#cite_note-36">[36]</a> In June 2011, a Promoter Group led by seven companies was formed.

The first commercially available NVMe chipsets were released by <a href="Integrated_Device_Technology" title="Integrated Device Technology">Integrated Device Technology</a> (89HF16P04AG3 and 89HF32P08AG3) in August 2012.<a href="#cite_note-37">[37]</a><a href="#cite_note-38">[38]</a> The first NVMe drive, <a href="Samsung" title="Samsung">Samsung</a>'s XS1715 <a href="Enterprise_storage" class="mw-redirect" title="Enterprise storage">enterprise drive</a>, was announced in July 2013; according to Samsung, this drive supported 3 GB/s read speeds, six times faster than their previous enterprise offerings.<a href="#cite_note-39">[39]</a> The LSI <a href="SandForce" title="SandForce">SandForce</a> SF3700 controller family, released in November 2013, also supports NVMe.<a href="#cite_note-40">[40]</a><a href="#cite_note-41">[41]</a> A Kingston <a href="HyperX" class="mw-redirect" title="HyperX">HyperX</a> "<a href="https://en.wiktionary.org/wiki/prosumer#Etymology_2" class="extiw external" title="wikt:prosumer">prosumer</a>" product using this controller was showcased at the <a href="Consumer_Electronics_Show" class="mw-redirect" title="Consumer Electronics Show">Consumer Electronics Show</a> 2014 and promised similar performance.<a href="#cite_note-42">[42]</a><a href="#cite_note-43">[43]</a> In June 2014, Intel announced their first NVM Express products, the Intel SSD data center family that interfaces with the host through PCI Express bus, which includes the DC P3700 series, the DC P3600 series, and the DC P3500 series.<a href="#cite_note-44">[44]</a> As of November 2014, NVMe drives are commercially available.

In March 2014, the group incorporated to become NVM Express, Inc., which as of November 2014 consists of more than 65 companies from across the industry. NVM Express specifications are owned and maintained by NVM Express, Inc., which also promotes industry awareness of NVM Express as an industry-wide standard. NVM Express, Inc. is directed by a thirteen-member board of directors selected from the Promoter Group, which includes Cisco, Dell, EMC, HGST, Intel, Micron, Microsoft, NetApp, Oracle, PMC, Samsung, SanDisk and Seagate.<a href="#cite_note-45">[45]</a>

In September 2016, the CompactFlash Association announced that it would be releasing a new memory card specification, <a href="CFexpress" title="CFexpress">CFexpress</a>, which uses NVMe.

NVMe Host Memory Buffer (HMB) feature added in version 1.2 of the NVMe specification.<a href="#cite_note-anandtech.com-46">[46]</a> HMB allows SSDs to use the host's <a href="Dynamic_random-access_memory" title="Dynamic random-access memory">DRAM</a>, which can improve the I/O performance for DRAM-less SSDs.<a href="#cite_note-47">[47]</a> For example, HMB can be used for cache the <a href="Flash_Translation_Layer" class="mw-redirect" title="Flash Translation Layer">FTL</a> table by the SSD controller, which can improve I/O performance.<a href="#cite_note-48">[48]</a> NVMe 2.0 added optional Zoned Namespaces (ZNS) feature and Key-Value (KV) feature, and support for rotating media such as <a href="Hard_disk_drive" title="Hard disk drive">hard disk drives</a>. ZNS and KV allows data to be mapped directly to its physical location in flash memory to directly access data on an SSD.<a href="#cite_note-49">[49]</a> ZNS and KV can also decrease <a href="Write_amplification" title="Write amplification">write amplification</a> of flash media.

<div class="mw-heading mw-heading2"><h2 id="Form_factors">Form factors</h2></div>

There are many form factors of NVMe solid-state drive, such as AIC, U.2, U.3, M.2 etc.

Almost all early NVMe solid-state drives are HHHL (half height, half length) or FHHL (full height, half length) <a href="PCI_Express" title="PCI Express">PCI Express</a> cards, with a PCIe 2.0 or 3.0 interface. A HHHL NVMe solid-state drive card is easy to insert into a PCIe slot of a server.

<div class="mw-heading mw-heading3"><h3 id="SATA_Express,_U.2_and_U.3_(SFF-8639)">SATA Express, U.2 and U.3 (SFF-8639)</h3></div>

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</style><div role="note" class="hatnote navigation-not-searchable">Main article: <a href="SATA_Express" title="SATA Express">SATA Express</a></div>

<a href="SATA_Express" title="SATA Express">SATA Express</a> allows the use of two PCI Express 2.0 or 3.0 lanes and two SATA 3.0 (6 Gbit/s) ports through the same host-side SATA Express connector (but not both at the same time). SATA Express supports NVMe as the logical device interface for attached PCI Express storage devices. It is electrically compatible with <a href="MultiLink_SAS" class="mw-redirect" title="MultiLink SAS">MultiLink SAS</a>, so a backplane can support both at the same time.

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="U.2" title="U.2">U.2</a></div>

U.2, formerly known as SFF-8639, uses the same physical port as SATA Express but allows up to four PCI Express lanes. Available servers can combine up to 48 U.2 NVMe solid-state drives.<a href="#cite_note-50">[50]</a>

U.3 (SFF-TA-1001) is built on the U.2 spec and uses the same SFF-8639 connector. Unlike in U.2, a single "tri-mode" (PCIe/SATA/SAS) backplane receptacle can handle all three types of connections; the controller automatically detects the type of connection used. This is unlike U.2, where users need to use separate controllers for SATA/SAS and NVMe. U.3 devices are required to be backwards-compatible with U.2 hosts, but U.2 drives are not compatible with U.3 hosts.<a href="#cite_note-51">[51]</a><a href="#cite_note-52">[52]</a>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="M.2" title="M.2">M.2</a></div>

M.2, formerly known as the Next Generation Form Factor (NGFF), uses a M.2 NVMe solid-state drive <a href="Computer_bus" class="mw-redirect" title="Computer bus">computer bus</a>. Interfaces provided through the M.2 connector are <a href="PCI_Express_3.0" class="mw-redirect" title="PCI Express 3.0">PCI Express 3.0</a> or higher (up to four <a href="PCI_Express_lane" class="mw-redirect" title="PCI Express lane">lanes</a>).

<div class="mw-heading mw-heading3"><h3 id="EDSFF">EDSFF</h3></div>

<div role="note" class="hatnote navigation-not-searchable">Main article: <a href="Enterprise_and_Data_Center_Standard_Form_Factor" title="Enterprise and Data Center Standard Form Factor">Enterprise and Data Center Standard Form Factor</a></div>

NVM Express over Fabrics (NVMe-oF) is the concept of using a <a href="Transport_layer" title="Transport layer">transport protocol</a> over a network to connect remote NVMe devices, contrary to regular NVMe where physical NVMe devices are connected to a <a href="PCI_Express#Serial_bus" title="PCI Express">PCIe bus</a> either directly or over a <a href="PCI_Express#SWITCH" title="PCI Express">PCIe switch</a> to a PCIe bus. In August 2017, a standard for using NVMe over <a href="Fibre_Channel" title="Fibre Channel">Fibre Channel</a> (FC) was submitted by the standards organization <a href="International_Committee_for_Information_Technology_Standards" title="International Committee for Information Technology Standards">International Committee for Information Technology Standards</a> (ICITS), and this combination is often referred to as FC-NVMe or sometimes NVMe/FC.<a href="#cite_note-tech1-53">[53]</a>

As of May 2021, supported NVMe transport protocols are:

<li><a href="Ethernet" title="Ethernet">Ethernet</a>, <a href="RDMA_over_Converged_Ethernet" title="RDMA over Converged Ethernet">RoCE</a> v1/v2 (<a href="Remote_direct_memory_access" title="Remote direct memory access">RDMA</a> over <a href="Data_center_bridging" title="Data center bridging">converged Ethernet</a>)<a href="#cite_note-56">[56]</a></li>

<li><a href="InfiniBand" title="InfiniBand">InfiniBand</a>, NVMe over InfiniBand or NVMe/IB<a href="#cite_note-57">[57]</a></li></ul>

The standard for NVMe over Fabrics was published by NVM Express, Inc. in 2016.<a href="#cite_note-58">[58]</a><a href="#cite_note-59">[59]</a>

The following software implements the NVMe-oF protocol:

<ul><li>Linux NVMe-oF <a href="SCSI_initiator_and_target" title="SCSI initiator and target">initiator and target</a>.<a href="#cite_note-60">[60]</a> RoCE transport was supported initially, and with <a href="Linux_kernel" title="Linux kernel">Linux kernel</a> 5.x, native support for TCP was added.<a href="#cite_note-61">[61]</a></li>

<li>Storage Performance Development Kit (SPDK) NVMe-oF initiator and target drivers.<a href="#cite_note-62">[62]</a> Both RoCE and TCP transports are supported.<a href="#cite_note-63">[63]</a><a href="#cite_note-64">[64]</a></li>

<li><a href="StarWind_Software" title="StarWind Software">StarWind</a> NVMe-oF initiator<a href="#cite_note-sw_initiator-65">[65]</a> and target for <a href="Linux" title="Linux">Linux</a> and <a href="Microsoft_Windows" title="Microsoft Windows">Microsoft Windows</a>, supporting both <a href="RDMA_over_Converged_Ethernet" title="RDMA over Converged Ethernet">RoCE</a> & <a href="Transmission_Control_Protocol" title="Transmission Control Protocol">TCP</a>, and <a href="Fibre_Channel" title="Fibre Channel">Fibre Channel</a> transports.<a href="#cite_note-sw_target-66">[66]</a></li>

<li><a rel="nofollow" class="external text" href="https://www.lightbitslabs.com/nvme-over-tcp/">Lightbits Labs</a> <a href="NVMe_over_TCP" title="NVMe over TCP">NVMe over TCP</a> target<a href="#cite_note-lbl_target-67">[67]</a> for various <a href="Linux" title="Linux">Linux</a> distributions<a href="#cite_note-lbl_target2-68">[68]</a> & public clouds.</li>

<li>Bloombase StoreSafe Intelligent Storage Firewall supports NVMe over <a href="RDMA_over_Converged_Ethernet" title="RDMA over Converged Ethernet">RoCE</a>, <a href="Transmission_Control_Protocol" title="Transmission Control Protocol">TCP</a>, and <a href="Fibre_Channel" title="Fibre Channel">Fibre Channel</a> for transparent storage security protection.</li>

<li><a rel="nofollow" class="external text" href="https://www.netapp.com/data-management/ontap-data-management-software/">NetApp ONTAP</a> supports iSCSI and <a href="NVMe_over_TCP" title="NVMe over TCP">NVMe over TCP</a><a href="#cite_note-69">[69]</a> targets.</li>

<li><a rel="nofollow" class="external text" href="https://www.simplyblock.io/our-technology/">Simplyblock</a> storage platform with NVMe over Fabrics support.<a href="#cite_note-70">[70]</a></li></ul>

<div class="mw-heading mw-heading2"><h2 id="Comparison_with_AHCI">Comparison with AHCI</h2></div>

The <a href="Advanced_Host_Controller_Interface" title="Advanced Host Controller Interface">Advanced Host Controller Interface</a> (AHCI) has the benefit of wide software compatibility, but has the downside of not delivering optimal performance when used with <a href="Solid-state_drive" title="Solid-state drive">SSDs</a> connected via the <a href="PCI_Express" title="PCI Express">PCI Express</a> bus. As a logical-device interface, AHCI was developed when the purpose of a <a href="Host_bus_adapter" class="mw-redirect" title="Host bus adapter">host bus adapter</a> (HBA) in a system was to connect the CPU/memory subsystem with a much slower storage subsystem based on rotating <a href="Magnetic_storage" title="Magnetic storage">magnetic media</a>. As a result, AHCI introduces certain inefficiencies when used with SSD devices, which behave much more like <a href="Random-access_memory" title="Random-access memory">RAM</a> than like spinning media.<a href="#cite_note-ahci-nvme-71">[71]</a>

The NVMe device interface has been designed from the ground up, capitalizing on the lower latency and <a href="Parallel_computing" title="Parallel computing">parallelism</a> of PCI Express SSDs, and complementing the parallelism of contemporary CPUs, platforms and applications. At a high level, the basic advantages of NVMe over AHCI relate to its ability to exploit parallelism in host hardware and software, manifested by the differences in <a href="Command_queue" title="Command queue">command queue</a> depths, efficiency of <a href="Interrupt" title="Interrupt">interrupt</a> processing, the number of uncacheable <a href="Processor_register" title="Processor register">register</a> accesses, etc., resulting in various performance improvements.<a href="#cite_note-ahci-nvme-71">[71]</a><a href="#cite_note-snia-windows-72">[72]</a>: 17–18

The table below summarizes high-level differences between the NVMe and AHCI logical-device interfaces.

<caption>High-level comparison of AHCI and NVMe<a href="#cite_note-ahci-nvme-71">[71]</a>

</caption>

<th>

</th>

</th>

<th>NVMe

</th></tr>

<tr>

<th>Maximum queue depth

</th>

<td>One command queue; Up to 32 commands per queue</td>

<td>Up to 65535 queues;<a href="#cite_note-73">[73]</a> Up to 65536 commands per queue

</td></tr>

<tr>

<th>Uncacheable register accesses (2000 cycles each)

</th>

<td>Up to six per non-queued command; Up to nine per queued command</td>

<td>Up to two per command

</td></tr>

<tr>

<th>Interrupt

</th>

<td>A single interrupt</td>

<td>Up to 2048 <a href="MSI-X" class="mw-redirect" title="MSI-X">MSI-X</a> interrupts

</td></tr>

<tr>

<th>Parallelism and multiple threads

</th>

<td>Requires synchronization lock to issue a command</td>

<td>No locking

</td></tr>

<tr>

<th>Efficiency for 4 KB commands

</th>

<td>Command parameters require two serialized host DRAM fetches</td>

<td>Gets command parameters in one 64-byte fetch

</td></tr>

<tr>

<th>Data transmission

</th>

<td>Usually half-duplex</td>

<td>Full-duplex

</td></tr>

<tr>

<th>Host Memory Buffer (HMB)

</th>

<td>Yes

</td></tr></tbody></table>

<div class="mw-heading mw-heading2"><h2 id="Operating_system_support">Operating system support</h2></div>

<dl><dt><a href="ChromeOS" title="ChromeOS">ChromeOS</a></dt>

<dd>On February 24, 2015, support for booting from NVM Express devices was added to <a href="ChromeOS" title="ChromeOS">ChromeOS</a>.<a href="#cite_note-75">[75]</a><a href="#cite_note-76">[76]</a></dd></dl>

<dl><dt><a href="DragonFly_BSD" title="DragonFly BSD">DragonFly BSD</a></dt>

<dd>The first release of <a href="DragonFly_BSD" title="DragonFly BSD">DragonFly BSD</a> with NVMe support is version 4.6.<a href="#cite_note-77">[77]</a></dd></dl>

<dl><dt><a href="FreeBSD" title="FreeBSD">FreeBSD</a></dt>

<dd>Intel sponsored a NVM Express driver for <a href="FreeBSD" title="FreeBSD">FreeBSD</a>'s head and stable/9 branches.<a href="#cite_note-78">[78]</a><a href="#cite_note-79">[79]</a> The nvd(4) and nvme(4) drivers are included in the GENERIC kernel configuration by default since FreeBSD version 10.2 in 2015.<a href="#cite_note-80">[80]</a></dd></dl>

<dl><dt><a href="Genode" title="Genode">Genode</a></dt>

<dd>Support for consumer-grade NVMe was added to the Genode framework as part of the 18.05<a href="#cite_note-81">[81]</a> release.</dd></dl>

<dl><dt><a href="Haiku_(operating_system)" title="Haiku (operating system)">Haiku</a></dt>

<dd><a href="Haiku_(operating_system)" title="Haiku (operating system)">Haiku</a> gained support for NVMe on April 18, 2019.<a href="#cite_note-82">[82]</a><a href="#cite_note-83">[83]</a></dd></dl>

<dl><dt><a href="Illumos" title="Illumos">illumos</a></dt>

<dd><a href="Illumos" title="Illumos">illumos</a> received support for NVMe on October 15, 2014.<a href="#cite_note-84">[84]</a></dd></dl>

<dd>With the release of the <a href="IPhone_6S" class="mw-redirect" title="IPhone 6S">iPhone 6S</a> and <a href="IPhone_6S_Plus" class="mw-redirect" title="IPhone 6S Plus">6S Plus</a>, <a href="Apple_Inc." title="Apple Inc.">Apple</a> introduced the first mobile deployment of NVMe over <a href="PCI_Express" title="PCI Express">PCIe</a> in smartphones.<a href="#cite_note-85">[85]</a> Apple followed these releases with the release of the first-generation <a href="IPad_Pro" title="IPad Pro">iPad Pro</a> and <a href="IPhone_SE_(1st_generation)" title="IPhone SE (1st generation)">first-generation iPhone SE</a> that also use NVMe over PCIe.<a href="#cite_note-86">[86]</a></dd></dl>

<dl><dt><a href="Linux" title="Linux">Linux</a></dt>

<dd>Intel published an NVM Express driver for <a href="Linux" title="Linux">Linux</a> on 3 March 2011,<a href="#cite_note-87">[87]</a><a href="#cite_note-88">[88]</a><a href="#cite_note-89">[89]</a> which was merged into the <a href="Linux_kernel" title="Linux kernel">Linux kernel</a> mainline on 18 January 2012 and released as part of version 3.3 of the Linux kernel on 19 March 2012.<a href="#cite_note-90">[90]</a> Linux kernel supports NVMe Host Memory Buffer<a href="#cite_note-91">[91]</a> from version 4.13.1<a href="#cite_note-92">[92]</a> with default maximum size 128 MB.<a href="#cite_note-93">[93]</a> Linux kernel supports NVMe Zoned Namespaces start from version 5.9.</dd></dl>

<dl><dt><a href="MacOS" title="MacOS">macOS</a></dt>

<dd>Apple introduced software support for NVM Express in <a href="OS_X_Yosemite" title="OS X Yosemite">Yosemite</a> 10.10.3. The NVMe hardware interface was introduced in the 2016 <a href="MacBook" title="MacBook">MacBook</a> and <a href="MacBook_Pro" title="MacBook Pro">MacBook Pro</a>.<a href="#cite_note-94">[94]</a></dd></dl>

<dl><dt><a href="NetBSD" title="NetBSD">NetBSD</a></dt>

<dd><a href="NetBSD" title="NetBSD">NetBSD</a> added support for NVMe in NetBSD 8.0.<a href="#cite_note-95">[95]</a> The implementation is derived from OpenBSD 6.0.</dd></dl>

<dl><dt><a href="OpenBSD" title="OpenBSD">OpenBSD</a></dt>

<dd>Development work required to support NVMe in <a href="OpenBSD" title="OpenBSD">OpenBSD</a> has been started in April 2014 by a senior developer formerly responsible for <a href="USB_2.0" class="mw-redirect" title="USB 2.0">USB 2.0</a> and <a href="Advanced_Host_Controller_Interface" title="Advanced Host Controller Interface">AHCI</a> support.<a href="#cite_note-96">[96]</a> Support for NVMe has been enabled in the OpenBSD 6.0 release.<a href="#cite_note-97">[97]</a></dd></dl>

<dd>Arca Noae provides an NVMe driver for <a href="ArcaOS" title="ArcaOS">ArcaOS</a>, as of April, 2021. The driver requires advanced interrupts as provided by the ACPI PSD running in advanced interrupt mode (mode 2), thus requiring the SMP kernel, as well.<a href="#cite_note-98">[98]</a></dd></dl>

<dl><dt><a href="Solaris_(operating_system)" class="mw-redirect" title="Solaris (operating system)">Solaris</a></dt>

<dd>Solaris received support for NVMe in Oracle Solaris 11.2.<a href="#cite_note-99">[99]</a></dd></dl>

<dl><dt><a href="VMware" title="VMware">VMware</a></dt>

<dd>Intel has provided an NVMe driver for <a href="VMware" title="VMware">VMware</a>,<a href="#cite_note-100">[100]</a> which is included in <a href="VMware_vSphere" title="VMware vSphere">vSphere</a> 6.0 and later builds, supporting various NVMe devices.<a href="#cite_note-101">[101]</a> As of vSphere 6 update 1, VMware's VSAN software-defined storage subsystem also supports NVMe devices.<a href="#cite_note-102">[102]</a></dd></dl>

<dl><dt><a href="Windows" class="mw-redirect" title="Windows">Windows</a></dt>

<dd>Microsoft added native support for NVMe to <a href="Windows_8.1" title="Windows 8.1">Windows 8.1</a> and <a href="Windows_Server_2012_R2" title="Windows Server 2012 R2">Windows Server 2012 R2</a>.<a href="#cite_note-snia-windows-72">[72]</a><a href="#cite_note-103">[103]</a> Native drivers for <a href="Windows_7" title="Windows 7">Windows 7</a> and <a href="Windows_Server_2008_R2" title="Windows Server 2008 R2">Windows Server 2008 R2</a> have been added in updates.<a href="#cite_note-104">[104]</a> Many vendors have released their own Windows drivers for their devices as well. There are also manually customized installer files available to install a specific vendor's driver to any NVMe card, such as using a Samsung NVMe driver with a non-Samsung NVMe device, which may be needed for additional features, performance, and stability.<a href="#cite_note-win-raid.com-105">[105]</a></dd>

<dd>Support for NVMe HMB was added in Windows 10 Anniversary Update (Version 1607) in 2016.<a href="#cite_note-anandtech.com-46">[46]</a> In Microsoft Windows from <a href="Windows_10_1607" class="mw-redirect" title="Windows 10 1607">Windows 10 1607</a> to <a href="Windows_11_23H2" class="mw-redirect" title="Windows 11 23H2">Windows 11 23H2</a>, the maximum HMB size is 64 MB. <a href="Windows_11_24H2" class="mw-redirect" title="Windows 11 24H2">Windows 11 24H2</a> updates the maximum HMB size to 1/64 of system RAM.<a href="#cite_note-106">[106]</a></dd>

<dd>Support for NVMe ZNS and KV was added in <a href="Windows_10_version_21H2" class="mw-redirect" title="Windows 10 version 21H2">Windows 10 version 21H2</a> and <a href="Windows_11" title="Windows 11">Windows 11</a> in 2021.<a href="#cite_note-107">[107]</a> The <a href="OpenFabrics_Alliance" title="OpenFabrics Alliance">OpenFabrics Alliance</a> maintains an open-source NVMe Windows Driver for Windows 7/8/8.1 and Windows Server 2008R2/2012/2012R2, developed from the baseline code submitted by several promoter companies in the NVMe workgroup, specifically IDT, Intel, and LSI.<a href="#cite_note-108">[108]</a> The current release is 1.5 from December 2016.<a href="#cite_note-109">[109]</a> The Windows built-in NVMe driver does not support <a href="Hardware_acceleration" title="Hardware acceleration">hardware acceleration</a>; hardware acceleration required vendor drivers.<a href="#cite_note-110">[110]</a></dd></dl>

<div class="mw-heading mw-heading2"><h2 id="Software_support">Software support</h2></div>

<dd>NVMe is supported by <a href="QEMU" title="QEMU">QEMU</a> since version 1.6 released on August 15, 2013.<a href="#cite_note-111">[111]</a> NVMe devices presented to QEMU guests can be either real or emulated.</dd></dl>

<dd>An open source NVMe driver for <a href="UEFI" title="UEFI">UEFI</a> called NvmExpressDxe is available as part of EDKII, the open-source reference implementation of UEFI.<a href="#cite_note-112">[112]</a></dd></dl>

<div class="mw-heading mw-heading2"><h2 id="Management_tools">Management tools</h2></div>

<div class="mw-heading mw-heading3"><h3 id="nvmecontrol">nvmecontrol</h3></div>

The <code>nvmecontrol</code> tool is used to control an NVMe disk from the command line on FreeBSD. It was added in FreeBSD 9.2.<a href="#cite_note-113">[113]</a>

NVM-Express user space tooling for Linux.<a href="#cite_note-114">[114]</a>

<li><a href="PCI_Express" title="PCI Express">PCI Express</a></li>

<li><a href="SATA_Express" title="SATA Express">SATA Express</a></li>

<li><a href="Solid-state_drive" title="Solid-state drive">Solid-state drive</a></li>

<li><a href="Universal_Flash_Storage" title="Universal Flash Storage">Universal Flash Storage</a> (UFS)</li></ul>

<div class="mw-heading mw-heading2"><h2 id="References">References</h2></div>

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<li id="cite_note-104"><a href="#cite_ref-104">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://support.microsoft.com/kb/2990941/en-us">"Update to support NVM Express by using native drivers in Windows 7 or Windows Server 2008 R2"</a>. Microsoft. 2014-11-13. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20141129141731/http://support.microsoft.com/kb/2990941/en-us">Archived</a> from the original on 2014-11-29. Retrieved 2014-11-17.</cite>

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<li id="cite_note-win-raid.com-105"><a href="#cite_ref-win-raid.com_105-0">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://web.archive.org/web/20210224231432/https://www.win-raid.com/t29f25-Recommended-AHCI-RAID-and-NVMe-Drivers.html">"Recommended AHCI/RAID and NVMe Drivers"</a>. 10 May 2013. Archived from <a rel="nofollow" class="external text" href="https://www.win-raid.com/t29f25-Recommended-AHCI-RAID-and-NVMe-Drivers.html">the original</a> on 24 February 2021. Retrieved 19 February 2021.</cite>

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<li id="cite_note-107"><a href="#cite_ref-107">^</a> <cite id="CITEREFlorihollasch2023" class="citation web cs1">lorihollasch (2023-08-09). <a rel="nofollow" class="external text" href="https://learn.microsoft.com/en-us/windows-hardware/drivers/storage/stornvme-feature-support">"NVMe Feature and Extended Capability Support - Windows drivers"</a>. learn.microsoft.com. Retrieved 2024-04-11.</cite>

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<li id="cite_note-111"><a href="#cite_ref-111">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="http://wiki.qemu.org/ChangeLog/1.6">"ChangeLog/1.6"</a>. qemu.org. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20180929194541/https://wiki.qemu.org/ChangeLog/1.6">Archived</a> from the original on 29 September 2018. Retrieved 21 March 2015.</cite>

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<li id="cite_note-112"><a href="#cite_ref-112">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://sourceforge.net/projects/edk2/files/EDK%20II%20Releases/other/NvmExpressDxe-alpha.zip/download">"Download EDK II from"</a>. SourceForge.net. <a rel="nofollow" class="external text" href="https://web.archive.org/web/20131231003656/http://sourceforge.net/projects/edk2/files/EDK%20II%20Releases/other/NvmExpressDxe-alpha.zip/download">Archived</a> from the original on 2013-12-31. Retrieved 2014-01-11.</cite>

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<li id="cite_note-113"><a href="#cite_ref-113">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://www.freebsd.org/cgi/man.cgi?query=nvmecontrol&sektion=8&manpath=freebsd-release-ports">"NVM Express control utility"</a>. The FreeBSD Project. 2018-03-12. Retrieved 2019-07-12.</cite>

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<li id="cite_note-114"><a href="#cite_ref-114">^</a> <cite class="citation web cs1"><a rel="nofollow" class="external text" href="https://github.com/linux-nvme/nvme-cli">"GitHub - linux-nvme/nvme-cli: NVMe management command line interface"</a>. linux-nvme. 2019-03-26. Retrieved 2019-03-27.</cite>

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</ol></div></div>

<div class="mw-heading mw-heading2"><h2 id="External_links">External links</h2></div>

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<div class="side-box-text plainlist">Wikimedia Commons has media related to <a href="https://commons.wikimedia.org/wiki/Category:NVM_Express" class="extiw external" title="commons:Category:NVM Express">NVM Express</a>.</div></div>

</div>

<ul><li><a rel="nofollow" class="external text" href="https://nvmexpress.org/">Official website</a></li>

<li><a rel="nofollow" class="external text" href="https://www.compactflash.org">CompactFlash Association</a></li>

<li><a rel="nofollow" class="external text" href="https://lwn.net/Articles/547903/">LFCS: Preparing Linux for nonvolatile memory devices</a>, <a href="LWN.net" title="LWN.net">LWN.net</a>, April 19, 2013, by Jonathan Corbet</li>

<li><a rel="nofollow" class="external text" href="https://events.static.linuxfound.org/sites/events/files/slides/LinuxVault2015_KeithBusch_PCIeMPath.pdf">Multipathing PCI Express Storage</a>, <a href="Linux_Foundation" title="Linux Foundation">Linux Foundation</a>, March 12, 2015, by Keith Busch</li>

<li><a rel="nofollow" class="external text" href="https://aboutnetworks.net/nvme-and-nvmeof/">NVMe, NVMe-oF and RDMA for network engineers</a>, August 2020, by Jerome Tissieres</li></ul>

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</style><div id="Solid-state_drives316" style="font-size:114%;margin:0 4em"><a href="Solid-state_drive" title="Solid-state drive">Solid-state drives</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">Key terminology</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Encryption" title="Encryption">Encryption</a></li>

<li><a href="Flash_file_system" title="Flash file system">Flash file system</a></li>

<li><a href="Flash_memory" title="Flash memory">Flash memory</a></li>

<li><a href="Flash_memory_controller" title="Flash memory controller">Flash memory controller</a></li>

<li><a href="Garbage_collection_(SSD)" class="mw-redirect" title="Garbage collection (SSD)">Garbage collection</a></li>

<li><a href="Flash_memory#Memory_wear" title="Flash memory">Memory wear</a></li>

<li><a href="Open-channel_SSD" title="Open-channel SSD">Open-channel SSD</a></li>

<li><a href="Write_amplification#Over-provisioning" title="Write amplification">Over-provisioning</a></li>

<li><a href="Flash_memory#Read_disturb" title="Flash memory">Read disturb</a></li>

<li><a href="Write_amplification#Secure_erase" title="Write amplification">Secure erase</a></li>

<li><a href="Solid-state_storage" title="Solid-state storage">Solid-state storage</a></li>

<li><a href="Trim_(computing)" title="Trim (computing)">Trim command</a></li>

<li><a href="Wear_leveling" title="Wear leveling">Wear leveling</a></li>

<li><a href="Write_amplification" title="Write amplification">Write amplification</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Flash manufacturers</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Micron_Technology" title="Micron Technology">Micron</a></li>

<li><a href="Samsung_Electronics" title="Samsung Electronics">Samsung</a></li>

<li><a href="SK_Hynix" title="SK Hynix">SK Hynix</a>

<ul><li>Bought <a href="Intel" title="Intel">Intel</a>'s NAND flash chips and NAND flash SSD businesses and renamed the SSD business as Solidigm</li></ul></li>

<li>Flash Forward (joint venture between <a href="Sandisk" title="Sandisk">Sandisk</a> and <a href="Kioxia" title="Kioxia">Kioxia</a>)</li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%"><a href="List_of_flash_memory_controller_manufacturers" title="List of flash memory controller manufacturers">Controllers</a></th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em"></div><table class="nowraplinks navbox-subgroup" style="border-spacing:0"><tbody><tr><th scope="row" class="navbox-group" style="width:1%">Captive</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Sandisk" title="Sandisk">Sandisk</a>

<ul><li><a href="Western_Digital" title="Western Digital">Western Digital</a></li>

<li><a href="Fusion-io" title="Fusion-io">Fusion-io</a></li>

<li><a href="Kioxia" title="Kioxia">Kioxia</a>

<ul><li><a href="OCZ" title="OCZ">OCZ</a> (bankrupt, assets sold to Toshiba, which later spun off its SSD and flash business to Kioxia)</li>

<li><a href="Indilinx" title="Indilinx">Indilinx</a> (bought by OCZ)</li></ul></li>

<li><a href="Micron_Technology" title="Micron Technology">Micron</a></li>

<li><a href="Samsung_Electronics" title="Samsung Electronics">Samsung</a></li>

<li><a href="Seagate_Technology" title="Seagate Technology">Seagate</a>

<ul><li><a href="SandForce" title="SandForce">SandForce</a></li></ul></li>

<li><a href="SK_Hynix" title="SK Hynix">SK Hynix</a>

<ul><li>Bought <a href="Intel" title="Intel">Intel</a>'s NAND flash chips and NAND flash SSD businesses including controllers and renamed the SSD business Solidigm</li></ul></li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Independent</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Greenliant_Systems" title="Greenliant Systems">Greenliant Systems</a></li>

<li><a href="JMicron" title="JMicron">Maxiotek</a></li>

<li><a href="Marvell_Technology_Group" class="mw-redirect" title="Marvell Technology Group">Marvell</a></li>

<li><a href="Phison" title="Phison">Phison</a></li>

<li><a href="PMC-Sierra" title="PMC-Sierra">PMC-Sierra</a></li>

</div></td></tr></tbody></table><div></div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">SSD manufacturers</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="List_of_solid-state_drive_manufacturers" title="List of solid-state drive manufacturers">List of solid-state drive manufacturers</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Interfaces</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Advanced_Host_Controller_Interface" title="Advanced Host Controller Interface">Advanced Host Controller Interface</a> (AHCI)</li>

<li><a href="Fibre_Channel" title="Fibre Channel">Fibre Channel</a> (FC)</li>

<li><a href="PCI_Express" title="PCI Express">PCI Express</a> (PCIe)</li>

<li><a href="SATA_Express" title="SATA Express">SATA Express</a></li>

<li><a href="Serial_ATA" class="mw-redirect" title="Serial ATA">Serial ATA</a> (SATA)</li>

<li><a href="Serial_attached_SCSI" class="mw-redirect" title="Serial attached SCSI">Serial attached SCSI</a> (SAS)</li>

<li><a href="USB" title="USB">Universal Serial Bus</a> (USB)</li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Configurations</th><td class="navbox-list-with-group navbox-list navbox-odd" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Hard_disk_drive#Form_factors" title="Hard disk drive">HDD form factors</a></li>

<li><a href="MSATA" class="mw-redirect" title="MSATA">mSATA</a></li>

<li><a href="PCI_Express" title="PCI Express">PCI Express</a> <a href="Expansion_card" title="Expansion card">expansion card</a></li>

<li><a href="Thunderbolt_(interface)" title="Thunderbolt (interface)">Thunderbolt</a>

<li><a href="EDSFF" class="mw-redirect" title="EDSFF">EDSFF</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Related organizations</th><td class="navbox-list-with-group navbox-list navbox-even" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="International_Committee_for_Information_Technology_Standards" title="International Committee for Information Technology Standards">INCITS</a></li>

<li><a href="JEDEC" title="JEDEC">JEDEC / JC-42, JC-64.8</a></li>

<li><a class="mw-selflink-fragment" href="#History">NVMHCI Work Group</a></li>

<li><a href="Small_Form_Factor_Committee" title="Small Form Factor Committee">SFF Committee</a></li>

</div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div>

<ul><li> Category</li></ul>

</div></td></tr></tbody></table></div>

<div class="navbox-styles"></div><div role="navigation" class="navbox" aria-labelledby="Technical_and_de_facto_standards_for_wired_computer_buses462" style="padding:3px"><table class="nowraplinks mw-collapsible autocollapse navbox-inner" style="border-spacing:0;background:transparent;color:inherit"><tbody><tr><th scope="col" class="navbox-title" colspan="2"><div id="Technical_and_de_facto_standards_for_wired_computer_buses462" style="font-size:114%;margin:0 4em"><a href="Technical_standard" title="Technical standard">Technical</a> and <a href="De_facto_standard" title="De facto standard">de facto standards</a> for <a href="Wired_communication" title="Wired communication">wired</a> <a href="Bus_(computing)" title="Bus (computing)">computer buses</a></div></th></tr><tr><th scope="row" class="navbox-group" style="width:1%">General</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="System_bus" title="System bus">System bus</a></li>

<li><a href="Front-side_bus" title="Front-side bus">Front-side bus</a></li>

<li><a href="Daisy_chain_(electrical_engineering)" title="Daisy chain (electrical engineering)">Daisy chain</a></li>

<li><a href="Control_bus" title="Control bus">Control bus</a></li>

<li><a href="Address_bus" class="mw-redirect" title="Address bus">Address bus</a></li>

<li><a href="Bus_contention" title="Bus contention">Bus contention</a></li>

<li><a href="Bus_mastering" title="Bus mastering">Bus mastering</a></li>

<li><a href="Network_on_a_chip" title="Network on a chip">Network on a chip</a></li>

<li><a href="List_of_interface_bit_rates#Computer_buses" title="List of interface bit rates">List of bus bandwidths</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Standards</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="Multibus" title="Multibus">Multibus</a></li>

<li><a href="Unibus" title="Unibus">Unibus</a></li>

<li><a href="VAXBI_bus" class="mw-redirect" title="VAXBI bus">VAXBI</a></li>

<li><a href="System_Management_Bus" title="System Management Bus">SMBus</a></li>

<li><a href="Europe_Card_Bus" title="Europe Card Bus">Europe Card Bus</a></li>

<li><a href="STEbus" title="STEbus">STEbus</a></li>

<li><a href="Zorro_II" title="Zorro II">Zorro II</a></li>

<li><a href="Zorro_III" title="Zorro III">Zorro III</a></li>

<li><a href="Computer_Automated_Measurement_and_Control" title="Computer Automated Measurement and Control">CAMAC</a></li>

<li><a href="FASTBUS" title="FASTBUS">FASTBUS</a></li>

<li><a href="HP_Precision_Bus" title="HP Precision Bus">HP Precision Bus</a></li>

<li><a href="NuBus" title="NuBus">NuBus</a></li>

<li><a href="TURBOchannel" title="TURBOchannel">TURBOchannel</a></li>

<li><a href="InfiniBand" title="InfiniBand">InfiniBand</a></li>

<li><a href="Ethernet" title="Ethernet">Ethernet</a></li>

<li><a href="PCI-X" title="PCI-X">PCI Extended (PCI-X)</a></li>

<li><a href="PCI_Express" title="PCI Express">PCI Express (PCIe)</a></li>

<li><a href="Compute_Express_Link" title="Compute Express Link">Compute Express Link (CXL)</a></li>

<li><a href="Direct_Media_Interface" title="Direct Media Interface">Direct Media Interface (DMI)</a></li>

<li><a href="RapidIO" title="RapidIO">RapidIO</a></li>

<li><a href="Intel_QuickPath_Interconnect" title="Intel QuickPath Interconnect">Intel QuickPath Interconnect</a></li>

<li><a href="NVLink" title="NVLink">NVLink</a></li>

<li><a href="HyperTransport" title="HyperTransport">HyperTransport</a>

<ul><li><a href="Infinity_Fabric" class="mw-redirect" title="Infinity Fabric">Infinity Fabric</a></li></ul></li>

<li><a href="Intel_Ultra_Path_Interconnect" title="Intel Ultra Path Interconnect">Intel Ultra Path Interconnect</a></li>

<li><a href="Coherent_Accelerator_Processor_Interface" title="Coherent Accelerator Processor Interface">Coherent Accelerator Processor Interface (CAPI)</a></li>

<li><a href="SpaceWire" title="SpaceWire">SpaceWire</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Storage</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="Floppy_disk_drive_interface" title="Floppy disk drive interface">Floppy connector</a></li>

<li><a href="Parallel_ATA" title="Parallel ATA">Parallel ATA (PATA)</a></li>

<li><a href="HIPPI" title="HIPPI">HIPPI</a></li>

<li><a href="SATA" title="SATA">Serial ATA (SATA)</a></li>

<ul><li><a href="Parallel_SCSI" title="Parallel SCSI">Parallel</a></li>

<li><a href="ESCON" title="ESCON">ESCON</a></li>

<li><a href="Fibre_Channel" title="Fibre Channel">Fibre Channel</a></li>

<li><a href="SATA_Express" title="SATA Express">SATAe</a></li>

<li>PCI Express (via <a href="Advanced_Host_Controller_Interface" title="Advanced Host Controller Interface">AHCI</a> or logical device interface)</li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Peripheral</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Apple_Desktop_Bus" title="Apple Desktop Bus">Apple Desktop Bus</a></li>

<li><a href="Atari_SIO" title="Atari SIO">Atari SIO</a></li>

<li><a href="Commodore_bus" title="Commodore bus">Commodore bus</a></li>

<li><a href="Lightning_(connector)" title="Lightning (connector)">Lightning</a></li>

<li><a href="IEEE_1284" title="IEEE 1284">IEEE-1284 (parallel port)</a></li>

<li><a href="IEEE_1394" title="IEEE 1394">IEEE-1394 (FireWire)</a></li>

<li><a href="I%C2%B2C" title="I²C">I²C</a> (<a href="ACCESS.bus" title="ACCESS.bus">ACCESS.bus</a>, <a href="Power_Management_Bus" title="Power Management Bus">PMBus</a>, <a href="System_Management_Bus" title="System Management Bus">SMBus</a>)</li>

<li><a href="Parallel_SCSI" title="Parallel SCSI">Parallel SCSI</a></li>

<li><a href="Profibus" title="Profibus">Profibus</a></li>

<li><a href="Camera_Link" title="Camera Link">Camera Link</a></li>

<li><a href="PCI_Express#PCI_Express_External_Cabling" title="PCI Express">External PCIe</a></li>

<li><a href="Thunderbolt_(interface)" title="Thunderbolt (interface)">Thunderbolt</a></li>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Audio</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="ADAT_Lightpipe" title="ADAT Lightpipe">ADAT Lightpipe</a></li>

<li><a href="Intel_High_Definition_Audio" title="Intel High Definition Audio">Intel HD Audio</a></li>

<li><a href="McASP" title="McASP">McASP</a></li>

<li><a href="TOSLINK" title="TOSLINK">TOSLINK</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Portable</th><td class="navbox-list-with-group navbox-list navbox-even hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<li><a href="ExpressCard" title="ExpressCard">ExpressCard</a></li></ul>

</div></td></tr><tr><th scope="row" class="navbox-group" style="width:1%">Embedded</th><td class="navbox-list-with-group navbox-list navbox-odd hlist" style="width:100%;padding:0"><div style="padding:0 0.25em">

<ul><li><a href="Multidrop_bus" title="Multidrop bus">Multidrop bus</a></li>

<li><a href="CoreConnect" title="CoreConnect">CoreConnect</a></li>

<li><a href="Wishbone_(computer_bus)" title="Wishbone (computer bus)">Wishbone</a></li>

<li><a href="SLIMbus" title="SLIMbus">SLIMbus</a></li></ul>

</div></td></tr><tr><td class="navbox-abovebelow" colspan="2"><div>Interfaces are listed by their speed in the (roughly) ascending order, so the interface at the end of each section should be the fastest. Category</div></td></tr></tbody></table></div></div><div><div class="zim-footer">

This article is issued from <a class="external text" title="Last edited on 2025-08-06" href="https://en.wikipedia.org/wiki/?title=NVM_Express&oldid=1304463600">Wikipedia</a>. The text is available under <a class="external text" href="https://creativecommons.org/licenses/by-sa/4.0/deed.en">Creative Commons Attribution-Share Alike 4.0</a> unless otherwise noted. Additional terms may apply for the media files.

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